Insulated gate field effect transistors are becoming increasingly important in low voltage and low power applications such as portable communications and portable computers, i.e., pagers, cellular phones, digital logic, memories, etc. Since low power consumption is a primary goal in these applications, these types of transistors are typically designed to operate at supply voltages of less than 3.5 volts. However, their subthreshold characteristics limit the minimum supply voltages at which these transistors are capable of reliably operating. More particularly, when the gate-to-source voltage is below the threshold voltage, the channel current decreases approximately exponentially with a decreasing gate voltage rather than becoming zero. Thus, current flows (hence power is consumed) even when the gate-to-source voltage is less than the threshold voltage.
A parameter commonly used to characterize the performance of insulated gate field effect transistors in the subthreshold region is the subthreshold swing. The subthreshold swing refers to the change in the gate-to-source voltage required to change the drain current by an order of magnitude. Insulated gate field effect transistors having high subthreshold swing values have large leakage currents and consume relatively large amounts of standby power. Insulated gate field effect transistors having low subthreshold swing values, on the other hand, have low leakage currents, consume less power, and are more ideally suited for low power applications.
Accordingly, it would be advantageous to have a method for fabricating insulated gate field effect transistors that reduces the subthreshold swing of the transistors and increases their peak transconductance and saturation current. It would be of further advantage for the method to be easily integrated into insulated gate field effect transistor process flows.